Regviz

Microchip Technology /ATSAMV71Q19 /PMC /FSPR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FSPR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Microchip Technology/ATSAMV71J21/PMC/FSPR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FSTP0)FSTP0 0 (FSTP1)FSTP1 0 (FSTP2)FSTP2 0 (FSTP3)FSTP3 0 (FSTP4)FSTP4 0 (FSTP5)FSTP5 0 (FSTP6)FSTP6 0 (FSTP7)FSTP7 0 (FSTP8)FSTP8 0 (FSTP9)FSTP9 0 (FSTP10)FSTP10 0 (FSTP11)FSTP11 0 (FSTP12)FSTP12 0 (FSTP13)FSTP13 0 (FSTP14)FSTP14 0 (FSTP15)FSTP15

Description

Fast Startup Polarity Register

Fields

FSTP0

Fast Startup Input Polarity 0
FSTP1

Fast Startup Input Polarity 1
FSTP2

Fast Startup Input Polarity 2
FSTP3

Fast Startup Input Polarity 3
FSTP4

Fast Startup Input Polarity 4
FSTP5

Fast Startup Input Polarity 5
FSTP6

Fast Startup Input Polarity 6
FSTP7

Fast Startup Input Polarity 7
FSTP8

Fast Startup Input Polarity 8
FSTP9

Fast Startup Input Polarity 9
FSTP10

Fast Startup Input Polarity 10
FSTP11

Fast Startup Input Polarity 11
FSTP12

Fast Startup Input Polarity 12
FSTP13

Fast Startup Input Polarity 13
FSTP14

Fast Startup Input Polarity 14
FSTP15

Fast Startup Input Polarity 15

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data